Article ID: 000075745 Content Type: Troubleshooting Last Reviewed: 11/15/2011

Calibration Fails for QDR II/II Designs Targeting Stratix V Devices

Environment

  • Quartus® II Subscription Edition
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT

    Critical Issue

    Description

    Half-rate QDR II/II designs using the Nios II sequencer at speeds below 300 MHz may experience calibration failures when targeting Stratix V devices.

    This issue will be fixed in a future version of the QDR II and QDR II SRAM Controller with UniPHY.

    Resolution

    The workaround for this issue is to run half-rate QDR II/II designs using the Nios II sequencer targeting Stratix V devices at speeds faster than 300 MHz.

    Related Products

    This article applies to 1 products

    Stratix® V FPGAs