The below error occurs when you use the PCI Express® HardIP and if you have installed Quartus® II with only a limited set of devices. For example, only Cyclone® IV GX device support has been installed.
To workaround this error, you can simply re-install Quartus II ensuring that all device famlies are installed, and then regenerate the PCI Express IP.
This problem will be fixed in a future version of the Quartus II software.
Error: PLL "<variation name>_example_chaining_pipen1b:core|<variation name>_plus:ep_plus|<variation name>:epmap|<<variation name>_serdes:serdes|<variation name>_serdes_alt_c3gxb_aac8:<variation name>_serdes_alt_c3gxb_aac8_component|altpll:pll0|altpll_ld81:auto_generated|pll1" has port CLK[0] connected but parameters clk0_multiply_by and/or clk0_divide_by are either unspecified or set to 0