Critical Issue
The Interlaken (2nd Generation) Intel® FPGA IP Design Example will fail in hardware when "Select Board" parameter is set to "Intel® Stratix® 10 TX Signal Integrity Development Kit -E-tile". The hardware test will fail with the symptom of word_locked and sync_locked signals not being asserted.
This problem is due to incorrect location assignments in the auto-generated design example Intel® Quartus® Settings File (QSF).
To work around this problem in the Intel® Quartus® Prime Pro Edition Software version 20.4 and earlier, manually change the following QSF assignments when targetting the Intel® Stratix® 10 TX Signal Integrity Development Kit - E-Tile.
For Intel® Stratix 10® TX Signal Integrity Development Kit, E-Tile NRZ Configurations:
| Signal Name | Assignment in v20.4 and earlier | Correct Assignment |
| pll_ref_clk[0] | PIN_AB37 | PIN_AN40 |
| refclk_preserve_bti_ch0 | PIN_AN40 | PIN_BC18 |
| refclk_preserve_bti_ch1 | PIN_AB41 | PIN_AB41 |
| refclk_preserve_bti_ch2/pll_ref_clk[1] | PIN_AB14 | PIN_AN42 |
| refclk_preserve_bti_ch3 | PIN_AN15 | PIN_AN15 |
| refclk_preserve_bti_ch4 | PIN_BC18 | PIN_AB14 |
| tx_pin[0] | PIN_R51 | PIN_AW51 |
| rx_pin[0] | PIN_P48 | PIN_AW45 |
| tx_pin[1] | PIN_N51 | PIN_AV54 |
| rx_pin[1] | PIN_K48 | PIN_AV48 |
| tx_pin[2] | PIN_G51 | PIN_AU51 |
| rx_pin[2] | PIN_N45 | PIN_AU45 |
| tx_pin[3] | PIN_D54 | PIN_AT54 |
| rx_pin[3] | PIN_E45 | PIN_AT48 |
| tx_pin[4] | PIN_L51 | PIN_AL51 |
| rx_pin[4] | PIN_F48 | PIN_AL45 |
| tx_pin[5] | PIN_J51 | PIN_AK54 |
| rx_pin[5] | PIN_J45 | PIN_AK48 |
| tx_pin[6] | PIN_C45 | PIN_AJ51 |
| rx_pin[6] | PIN_K42 | PIN_AJ45 |
| tx_pin[7] | PIN_D42 | PIN_AH54 |
| rx_pin[7] | PIN_D36 | PIN_AH48 |
| tx_pin[8] | PIN_C51 | PIN_AG51 |
| rx_pin[8] | PIN_E39 | PIN_AG45 |
| tx_pin[9] | PIN_D48 | PIN_AF54 |
| rx_pin[9] | PIN_H42 | PIN_AF48 |
| tx_pin[10] | PIN_C39 | PIN_AE51 |
| rx_pin[10] | PIN_H36 | PIN_AE45 |
| tx_pin[11] | PIN_B36 | PIN_AD54 |
| rx_pin[11] | PIN_C33 | PIN_AD48 |
For Intel® Stratix 10® TX Signal Integrity Development Kit, E-Tile PAM4 Configurations:
| Signal Name | Assignment in v20.4 and earlier | Correct Assignment |
| pll_ref_clk[0] | PIN_AB12 | PIN_AN40 |
| refclk_preserve_bti_ch0 | PIN_AN40 | PIN_BC18 |
| refclk_preserve_bti_ch1 | PIN_AB41 | PIN_AB41 |
| refclk_preserve_bti_ch2/pll_ref_clk[1] | PIN_AB14 | PIN_AN42 |
| refclk_preserve_bti_ch3 | PIN_AN15 | PIN_AN15 |
| refclk_preserve_bti_ch4 | PIN_BC18 | PIN_AB14 |
| tx_pin[0] | PIN_R4 | PIN_AW51 |
| tx_pin_n[0] | PIN_R5 | PIN_AW50 |
| rx_pin[0] | PIN_P7 | PIN_AW45 |
| rx_pin_n[0] | PIN_P8 | PIN_AW44 |
| tx_pin[1] | PIN_P1 | PIN_AV54 |
| tx_pin_n[1] | PIN_P2 | PIN_AV53 |
| rx_pin[1] | PIN_M7 | PIN_AV48 |
| rx_pin_n[1] | PIN_M8 | PIN_AV47 |
| tx_pin[2] | PIN_N4 | PIN_AU51 |
| tx_pin_n[2] | PIN_N5 | PIN_AU50 |
| rx_pin[2] | PIN_K7 | PIN_AU45 |
| rx_pin_n[2] | PIN_K8 | PIN_AU44 |
| tx_pin[3] | PIN_M1 | PIN_AT54 |
| tx_pin_n[3] | PIN_M2 | PIN_AT53 |
| rx_pin[3] | PIN_H7 | PIN_AT48 |
| rx_pin_n[3] | PIN_H8 | PIN_AT47 |
| tx_pin[4] | PIN_G4 | PIN_AL51 |
| tx_pin_n[4] | PIN_G5 | PIN_AL50 |
| rx_pin[4] | PIN_N10 | PIN_AL45 |
| rx_pin_n[4] | PIN_N11 | PIN_AL44 |
| tx_pin[5] | PIN_F1 | PIN_AK54 |
| tx_pin_n[5] | PIN_F2 | PIN_AK53 |
| rx_pin[5] | PIN_R10 | PIN_AK48 |
| rx_pin_n[5] | PIN_R11 | PIN_AK47 |
| tx_pin[6] | PIN_D1 | PIN_AJ51 |
| tx_pin_n[6] | PIN_D2 | PIN_AJ50 |
| rx_pin[6] | PIN_E10 | PIN_AJ45 |
| rx_pin_n[6] | PIN_E11 | PIN_AJ44 |
| tx_pin[7] | PIN_E4 | PIN_AH54 |
| tx_pin_n[7] | PIN_E5 | PIN_AH53 |
| rx_pin[7] | PIN_F13 | PIN_AH48 |
| rx_pin_n[7] | PIN_F14 | PIN_AH47 |
| tx_pin[8] | PIN_C10 | PIN_AG51 |
| tx_pin_n[8] | PIN_C11 | PIN_AG50 |
| rx_pin[8] | PIN_K13 | PIN_AG45 |
| rx_pin_n[8] | PIN_K14 | PIN_AG44 |
| tx_pin[9] | PIN_A10 | PIN_AF54 |
| tx_pin_n[9] | PIN_A11 | PIN_AF53 |
| rx_pin[9] | PIN_L16 | PIN_AF48 |
| rx_pin_n[9] | PIN_L17 | PIN_AF47 |
| tx_pin[10] | PIN_D13 | PIN_AE51 |
| tx_pin_n[10] | PIN_D14 | PIN_AE50 |
| rx_pin[10] | PIN_D19 | PIN_AE45 |
| rx_pin_n[10] | PIN_D20 | PIN_AE44 |
| tx_pin[11] | PIN_B13 | PIN_AD54 |
| tx_pin_n[11] | PIN_B14 | PIN_AD53 |
| rx_pin[11] | PIN_F19 | PIN_AD48 |
| rx_pin_n[11] | PIN_F20 | PIN_AD47 |
This problem has been fixed starting in version 21.1 of the Intel® Quartus® Prime Pro Software.