Description
In the FLEX 10K devices, a logic element can drive one of the global clock or clear signals. However, this feature is not supported by the MAX PLUS® II software versions 8.0 and lower.
To drive one of these signals, drive the signal out to a pin, and drive it back in on a dedicated input. You can also use a high-speed clock throughout the design, and use the built-in synchronous clock enable to effectively gate the clock.
Altera supports a feature in the MAX PLUS II software version 8.1 and higher that allows you to use a logic-driven control signal as a global signal by inserting a GLOBAL buffer or by using a logic option. You can either modify your design file to include the GLOBAL buffer or turn on the Global Signal logic option. The use of global signals can be verified by consulting the Report File.