Critical Warning: Could not find pin of type cmd_pins from pattern … Failed to find PLL clock for pins

You may see the critical warnings in the fitter stage if you implement more than one DDR3 UniPHY based controller IP Cores in Quartus® II software version 10.0 as master and slave.

You may also see another critical warning

Critical Warning: Failed to find PLL clock for pins...

To remove the critical warnings, implement the following steps:

1. Connect signal “pll_dqs_ena_clk” to the slave UniPHY IP Core.

2. Make sure that you have connected “mem_cs_n” to top level I/Os.

3. The QIP files of master interfaces should appear before those of the slaves in the project's QSF.

This issue has been fixed in Quartus II software version 10.1 and later.