Article ID: 000075131 Content Type: Troubleshooting Last Reviewed: 09/11/2012

Why do the DATA[7..1] configuration pins not show up in the Quartus II software Pinout (.pin) File?

Environment

BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description

The DATA[7..1] pins may show up in Quartus® II software as "RESERVED_INPUT_WITH_WEAK_PULLUP" instead of "~ALTERA_DATA1~ / RESERVED_INPUT" if you are not using the Fast Passive Parallel (FPP) configuration scheme and if your Quartus II settings file (QSF) does not have the following line:

set_global_assignment -name RESERVE_DATA7_THROUGH_DATA1_AFTER_CONFIGURATION "AS INPUT TRI-STATED"

Although the Quartus II software GUI had all these options selected, it may have been deleted when modifying the QSF.

Related Products

This article applies to 1 products

Stratix® III FPGAs