Article ID: 000074862 Content Type: Error Messages Last Reviewed: 08/21/2023

Warning: Illegal value detected on input clock

Environment

BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description

When simulating an Arria® II GX ALTMEMPHY-based memory controller design, this warning message may appear for the input clock to the DLL.

 

 

Resolution

This warning message is harmless and can safely be ignored by the user.

Related Products

This article applies to 8 products

Stratix® III FPGAs
Stratix® IV E FPGA
Stratix® IV GT FPGA
Cyclone® III FPGAs
Cyclone® IV E FPGA
Cyclone® IV GX FPGA
Stratix® IV GX FPGA
Arria® II GX FPGA

Need more help?

Contact support

Disclaimer

1

All postings and use of the content on this site are subject to Intel.com Terms of Use.