Due to a bug in version 12.1SP1 of the Quartus® II software, the required PCIe® transceiver PMA setting in Avalon-MM mode is incorrectly set to zero for Arria® V and Cyclone® V devices.
After Qsys generation has been completed, manually modify the following files found in the folder <Qsys System>\synthesis\submodules\
altpcie_av_hip_ast_hwtcl.v and altpcie_cv_hip_ast_hwtcl.v
Change from:
parameter rpre_emph_a_val_hwtcl = 0,
parameter rpre_emph_b_val_hwtcl = 0,
parameter rpre_emph_c_val_hwtcl = 0,
parameter rpre_emph_d_val_hwtcl = 0,
parameter rpre_emph_e_val_hwtcl = 0,
parameter rvod_sel_a_val_hwtcl = 0,
parameter rvod_sel_b_val_hwtcl = 0,
parameter rvod_sel_c_val_hwtcl = 0,
parameter rvod_sel_d_val_hwtcl = 0,
parameter rvod_sel_e_val_hwtcl = 0
To:
parameter rpre_emph_a_val_hwtcl = 6\'b000000,
parameter rpre_emph_b_val_hwtcl = 6\'b000000,
parameter rpre_emph_c_val_hwtcl = 6\'b010000,
parameter rpre_emph_d_val_hwtcl = 6\'b001100,
parameter rpre_emph_e_val_hwtcl = 6\'b000101,
parameter rvod_sel_a_val_hwtcl = 6\'b101001,
parameter rvod_sel_b_val_hwtcl = 6\'b100111,
parameter rvod_sel_c_val_hwtcl = 6\'b100101,
parameter rvod_sel_d_val_hwtcl = 6\'b100111,
parameter rvod_sel_e_val_hwtcl = 6\'b001111
This issue is scheduled to be fixed in a future version of the Quartus® II Software.