Description
When creating IP to
interface with the Stratix-series or Cyclone-series devices, Altera recommends you to download the Altera memory controller IP regardless of whether or not you wish to use Altera's core logic. The memory controller IP includes both core logic IP as well as the free datapath (I/O) interface. The datapath interface is recommended whether you develop your own core logic or use IP provided by Altera. Using our recommended datapath ensures you will leverage the analysis and hardware testing Altera has done for this implementation. Further, the IP core tool suite includes timing analysis and placement constraints that make customer usability a simple process.