Article ID: 000074249 Content Type: Troubleshooting Last Reviewed: 06/17/2020

Are the Intel® Stratix® 10 device SDM_IO pins configured as open drain when used as PWRMGT_SDA and PWRMGT_SCL for SmartVID PMBus Power Management?

Environment

  • Intel® Quartus® Prime Pro Edition
    • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    Yes, the SDM_IO pins on Intel® Stratix® devices will be configured as open drain when used as PWRMGT_SDA and PWRMGT_SCL for SmartVID PMBus Power Management.

    Resolution

    This information has been added to the Intel® Stratix® 10 Device Family Pin Connection Guidelines starting from version 2020.04.20 

    Related Products

    This article applies to 1 products

    Intel® Stratix® 10 FPGAs and SoC FPGAs

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