Due to a problem in Intel® Quartus® Prime Pro Edition Software version 20.2 and earlier, when using the Mailbox Client Intel® FPGA IP or Mailbox Avalon® Streaming Interface Client Intel® FPGA IP in Intel® Stratix® 10 FPGA or Intel Agilex® 7 devices, you may see that these Mailbox IP become unresponsive or hang when issuing the following commands :
QSPI_WRITE – Used to write RPD file content into QSPI flash
QSPI_WRITE_DEVICE_REG – Used to do sector erase on QSPI flash
When the problem occurs, the Mailbox IP cannot return valid data where Bit 0 (Data Valid Interrupt) of the Interrupt Status Register (ISR) returns ‘0’ or never asserts to ‘1’, which indicates the FIFO is empty. The IP cannot recover from the error state when resetting the IP.
This issue is fixed in Intel® Quartus® Prime Pro Edition Software version 20.3 and later. If facing the issue above, recompile the Mailbox IP in this software release.