Article ID: 000073988 Content Type: Troubleshooting Last Reviewed: 04/17/2023

Why do I see a Bit Error Rate (BER) of 1 after drawing an eye in the Intel® Transceiver Toolkit when using Intel Stratix® 10 E-Tile transceivers? 

Environment

  • Intel® Quartus® Prime Pro Edition
  • Stratix® 10 E-Tile Transceiver Native PHY
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    Description

    Due to a problem with the error counter registers of the Intel® Stratix® 10 E-Tile transceivers, you might see a BER of 1 after drawing an eye in the Intel Transceiver Toolkit.

    You might also see the following message in the Transceiver Toolkit message pane.

    "Hard PRBS checker error counter has saturated. The checker has been stopped."

    Resolution

    To work around this problem, reprogram the Intel® Stratix® 10 FPGA.

    Related Products

    This article applies to 1 products

    Intel® Stratix® 10 TX FPGA