Article ID: 000073986 Content Type: Troubleshooting Last Reviewed: 04/04/2023

Can I assert the transceiver tx_pma_elecidle signal indefinitely on Intel® Arria® 10 devices?

Environment

  • Intel® Quartus® Prime Pro Edition
  • Transceiver Native PHY Intel® Arria® 10 Cyclone® 10 FPGA IP
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    No, you should not assert the transceiver tx_pma_elecidle signal indefinitely on Intel® Arria® 10 devices.

     

     

    Resolution

    The transceiver tx_pma_elecidle signal is similar to an analog reset signal. Asserting analog reset signals indefinitely can degrade transceiver performance. You can read about this degradation in the “Unused/Idle Clock Line Requirements” chapter of the Intel® Arria® 10 Transceiver PHY User Guide.

     

     

    Related Products

    This article applies to 1 products

    Intel® Arria® 10 FPGAs and SoC FPGAs