Article ID: 000073726 Content Type: Troubleshooting Last Reviewed: 05/10/2013

IP Compiler for PCI Express Variations that Target an Arria II GX Device are Missing pll_powerdown Signal

Environment

  • Quartus® II Subscription Edition
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT

    Critical Issue

    Description

    IP Compiler for PCI Express variations that target an Arria II GX device are missing the pll_powerdown signal which connects to the <variation>_serdes.v or .vhd module.

    This issue affects the hard IP implementation of the IP Compiler for PCI Express targeting Arria II GX devices when using a custom Quartus II installation that does not include the Stratix IV device family or when using the Quartus II Web Edition software.

    Resolution

    The workaround is to include the Stratix IV GX device family when you install the Quartus II software. However, this option is not available with the Quartus II Web Edition. No workaround is available in the Quartus II Web Edition.

    This issue will be fixed in a future version of the Quartus II software.

    Related Products

    This article applies to 2 products

    Arria® II FPGAs
    Arria® II GX FPGA