Article ID: 000073704 Content Type: Troubleshooting Last Reviewed: 04/03/2023

Why can't I force the parity on the Cyclone® V SoC UART?

Environment

  • Quartus® II Subscription Edition
    • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    The Arria® V and Cyclone® V SoC UART do not provide the flexibility to force the parity. Therefore, bit 5 in the UART lcr register documentation is greyed out as reserved.

    Resolution

    Intel has no plan to support this feature for the Cyclone V SoC device family but is available on Intel® Arria® 10 FPGAs.

     

    Related Products

    This article applies to 5 products

    Intel® Arria® 10 SX SoC FPGA
    Cyclone® V ST SoC FPGA
    Arria® V SX SoC FPGA
    Cyclone® V SX SoC FPGA
    Arria® V ST SoC FPGA

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