Overview of enclave thread entry and exit from logical cores
Unable to determine the logical core switching process for Intel® Software Guard Extensions (Intel® SGX) enclaves.
Enclaves execute within a particular thread as defined by the Thread Control Structure (TCS), which executes on a logical processor core. All instructions occur within the context of a TCS, and there can be multiple TCS per application. The Asynchronous Enclave Exit (AEX) instruction is issued to the particular logical core on which the enclave is running. The Enclave entry and exiting chapter of Innovative Instructions and Software Model for Isolated Execution explains this process fully.
"The EENTER instruction is the method to enter the enclave under program control. To execute EENTER, software must supply an address of a TCS that is part of the enclave to be entered. The TCS indicates the location inside the enclave to transfer control and where inside the enclave AEX should store the register state. When a logical processor enters an enclave, the TCS is considered busy until the logical processors exits the enclave. SGX allows an enclave builder to define multiple TCS structures, thereby providing support for multithreaded enclaves…Resuming Execution after AEX: After system software has serviced the event that caused the logical process to exit an enclave, the logical processor can re-start execution using ERESUME."