design entity Definition

A primitive, Intel^® FPGA IP, macrofunction, or state machine, which can be represented by either a name or a symbol in a design file.

A design entity can be a top-level design entity, which is a design entity that is the root of a design hierarchy, or a lower-level design entity (or, subdesign). A design entity can instantiate any number of lower-level design entities, and is the parent for the lower-level design entities.

The following design entity types are supported in the Quartus^® Prime software:

• AHDL subdesigns
• Block Design (.bdf) File entities
• EDIF cells in EDIF designs
• Verilog HDL modules
• Very High Speed Integrated Circuit (VHSIC) Hardware Description Language (VHDL) entity-architecture design units

Design entities are also referred to as logic functions or entities.