Node Finder (View Menu)
The Node Finder searches the project netlist and returns the node names that match your search criteria in the Nodes Found list. You can then perform various operations on the Nodes Found, such as locating to the node name in your design RTL or various other Quartus® Prime software tools.
DNI-Based Node Finder
The current version of the Quartus® Prime Pro Edition software now supports the Design Netlist Infrastructure (DNI) that enables new features for faster design convergence and a better user experience. The Node Finder now supports a DNI search mode with enhanced search options.
Node Finder Search Options
Click the Show More Search Options button in the Node Finder to display all search options available for the current search mode. The following search options are available for the classic and DNI search modes of the Node Finder:
Node Finder Search Options | Description | Available In Search Mode |
---|---|---|
Named | Specifies the node name, partial node name, and standard wildcard characters that limit the search to node names matching the specified text. Click the drop-down to reinsert previously entered search strings. | Classic and DNI |
Search | Starts the node name search using the current search Options and Filter. | Classic and DNI |
Expand all and Collapse all | Expands or collapses the view of nodes in the Nodes Found list. | Classic and DNI |
Hide Search Options and Show More Search Options | Hides or displays all search Options in the Node Finder. | Classic and DNI |
Filter | Specifies the current available or custom search filter for finding node names in the design netlist. The Quartus® Prime software includes a set of non-editable, default filters. You can use one of these filters to perform a node name search, or you can create a new custom filter based on one of the default filters. The Node Finder's DNI search mode includes some unique filters not available in Node Finder's classic search mode. | Classic and DNI |
Customize | Opens the Customize Filter dialog box that allows you to define a custom node name search filter. | Classic |
Look in | Allows you to view and edit the current search hierarchy path. You can type the search hierarchy path in the Look in box, or browse to select the search hierarchy level in the Select Hierarchy Level dialog box. In addition, you can move up the search hierarchy by deleting hierarchical names from the Look in box. | Classic and DNI |
Case-insensitive | Searches for node names with or without consideration of case. By default, the search is case-sensitive. | DNI |
Object type | Specifies which object type to search for. You can choose between instance, instance_bus, instance_port, port, port_bus, net, and net_bus. | DNI |
Include subentities | Includes node names that are below the current search hierarchy level in the node name search. | Classic |
Hierarchy view | Allows you to view nodes in the Nodes Found list in hierarchy levels. | Classic |
Node Finder Search Filters
The following search filters are available for the classic and DNI search modes of the Node Finder.
Filter Name | Description | Uses Search Mode |
---|---|---|
Design Entry (all names) | Finds all user-entered names in your design files. | Classic |
Pins: assigned | Finds all pin names assigned locations or other pin-related assignments. | Classic |
Pins: unassigned | Finds all pin names not assigned locations or other pin related assignments. | Classic |
Pins: input | Finds all input pin names in your design file(s). | Classic |
Pins: output | Finds all output pin names in your design file(s). | Classic |
Pins: bidirectional | Finds all bidirectional pin names in your design file(s). | Classic |
Pins: virtual | Finds names of all I/O elements mapped to logic elements with a Virtual Pin logic option assignment | Classic |
Pins: all | Finds all pin names in your design file(s). | Classic |
Pins: all & Registers: post-fitting | Finds all pin names in your design along with all register names from your design files that persist after physical synthesis and fitting. This filter is a combination of the Pins: all and Registers: post-fitting filters. | Classic |
Ports: partition | Finds all user entered and Compiler-generated partition port names in the post-fit netlist. | Classic |
Entity instance: pre-synthesis | Finds all entity instances in the pre-synthesis netlist. | DNI |
Registers: pre-synthesis | Finds all user-entered register names contained in the design after Analysis and Elaboration, but before physical synthesis performs any synthesis optimizations. | Classic |
Registers: post-fitting | Finds all user-entered register names in your design file(s) that survived physical synthesis and fitting. | Classic |
Post-synthesis | Finds all user-entered and synthesis-generated names contained in the design after design elaboration and physical synthesis. | Classic |
Post-synthesis: preserved for debug | Finds all internal device nodes in the post-synthesis netlist you have designated with preserve for debug. | Classic |
Post-Compilation | Finds all user-centered and Compiler-generated names that persist post fit and do not have location assignments. | Classic |
Signal Tap: pre-synthesis | Finds all internal device nodes in the pre-synthesis netlist that are preserved for analysis by the Signal Tap Logic Analyzer. | DNI |
Signal Tap: post-fitting | Finds all internal device nodes in the post fit netlist that are preserved for analysis by the Signal Tap Logic Analyzer. | Classic |
Signal Tap: pre-synthesis user defined | Finds all user defined internal device nodes in the pre-synthesis netlist that are preserved for analysis by the Signal Tap Logic Analyzer. | DNI |
Signal Tap: post-fitting user defined | Finds all user defined internal device nodes in the post-fit netlist that are preserved for analysis by the Signal Tap Logic Analyzer. | Classic |
Signal Tap: pre-synthesis preserved for debug | Finds all internal device nodes in the pre-synthesis netlist that are preserved for analysis by the Signal Tap Logic Analyzer. | DNI |
Signal Tap: post-fitting preserved for debug | Finds all internal device nodes in the post-fit netlist that are preserved for analysis by the Signal Tap Logic Analyzer. | Classic |