JKFFE Primitive
The JKFF primitive allows you to program a register as an edge-triggered JK flipflop.
Note: When the ENA (clock enable) input is high, the flipflop passes a
signal that is dependent on the J and K inputs to
Q. When the ENA input is low, the state of
Q is maintained, regardless of the J or
K inputs.
For devices that do not support clock enable, logic synthesis generates logic equations containing flipflops with clock enables. These logic equations correctly emulate the logic specified in the project.
Note: For information about Quartus® Prime primitive instantiation, go to Using a Quartus® Prime
Logic Function.