VHDL Component Declaration

The following VHDL component declaration is located in the VHDL Design File (.vhd) Definition ALTERA_PRIMITIVES_COMPONENTS.VHD located in the <Quartus^® Prime installation directory>\libraries\vhdl\altera directory.

component carry_sum

    port (

        sin : in std_logic;

        cin : in std_logic;

        sout : out std_logic;

        cout : out std_logic );

end component;