TMC-30041: Constraint with Invalid Clock Reference
Description
Violations of this rule identify constraints that reference one or more clocks that did not exist at the time the constraint was issued, or were deleted by the time SDC processing has completed. This may occur when constraints or SDC files are mis-ordered such that constraints reference a clock before it is created by create_clock or create_generated_clock .
Recommendation
Ensure that all constraints and SDC files are ordered such that any clocks referenced by a constraint are created before the constraint is issued. You may need to change the order at which .SDC and .IP files are read in, or change the order of constraints within a non-IP .SDC file. If your constraints reference clocks created by IP cores, move these constraints to a new SDC file that is read in after all .IP files in your project.
Severity
High
Tags
| Tag | Description |
|---|---|
| sdc | Design rule checks related to SDC validity checking. |
Device Family
- Intel®Cyclone® 10 GX
- Intel®Arria® 10
- Intel®Stratix® 10
- Intel Agilex®
- Intel Agilex®
- Intel Agilex®