TMC-20007: Unregistered Paths Between Partitions
Description
Found unregistered paths between design partitions in the project. A combinational timing path between two partitions is susceptible to timing closure challenges. Inter-partition timing paths depend upon clock skew between launch and latch registers, both of which are inside different partitions. This condition complicates timing closure.
Recommendation
Ensure that inter-partition paths are registered at the output of the driving partition.
Severity
Low
Tags
Tag | Description |
---|---|
design-partition | Design rule checks which check design partitions. |
Device Family
- Intel Agilex®
- Intel Agilex®
- Intel Agilex®
- Intel®Stratix® 10
- Intel®Arria® 10
- Intel®Cyclone® 10 GX