TMC-20013: Partial Input Delay
Description
Violations of this rule identify ports that have an input delay constraint without one or more rise-min, fall-min, rise-max, or fall-max specification.
Recommendation
Modify the input delay assignment using set_input_delay to add any missing portions of the constraint.
Severity
High
Tags
| Tag | Description |
|---|---|
| sdc | Design rule checks related to SDC validity checking. |
| system | Design rule checks which validate full-system design. |
Device Family
- Intel®Cyclone® 10 GX
- Intel®Arria® 10
- Intel®Stratix® 10
- Intel Agilex®
- Intel Agilex®
- Intel Agilex®