Filter
Specifies the current Intel-provided or user-defined Node Finder search filter. The Intel® Quartus® Prime software includes non-editable, default filters. You can use these filters to perform a node name search, or you can create a new filter using any of the Intel-provided filters settings as the initial settings.
The following search filters are available for the classic and DNI search modes of the Node Finder.
| Filter Name | Description | Search Mode |
|---|---|---|
| Design Entry (all names) | Finds all user-entered names in your design file(s). | Classic |
| Pins: assigned | Finds all pin names assigned locations or other pin-related assignments. | Classic |
| Pins: unassigned | Finds all pin names not assigned locations or other pin related assignments. | Classic |
| Pins: input | Finds all input pin names in your design file(s). | Classic |
| Pins: output | Finds all output pin names in your design file(s). | Classic |
| Pins: bidirectional | Finds all bidirectional pin names in your design file(s). | Classic |
| Pins: virtual | Finds names of all I/O elements mapped to logic elements with a Virtual Pin logic option assignment | Classic |
| Pins: all | Finds all pin names in your design file(s). | Classic |
| Pins: all & Registers: post-fitting | Finds all pin names in your design along with all register names from your design files that persist after physical synthesis and fitting. This filter is a combination of the Pins: all and Registers: post-fitting filters. | Classic |
| Ports: partition | Finds all user entered and Compiler-generated partition port names in the post-fit netlist. | Classic |
| Entity instance: pre-synthesis | Finds all entity instances in the pre-synthesis netlist. | DNI |
| Registers: pre-synthesis | Finds all user-entered register names contained in the design after Analysis and Elaboration, but before physical synthesis performs any synthesis optimizations. | Classic |
| Registers: post-fitting | Finds all user-entered register names in your design file(s) that survived physical synthesis and fitting. | Classic |
| Post-synthesis | Finds all user-entered and synthesis-generated names contained in the design after design elaboration and physical synthesis. | Classic |
| Post-synthesis: preserved for debug | Finds all internal device nodes in the post-synthesis netlist you have designated with preserve for debug. | Classic |
| Post-Compilation | Finds all user-centered and Compiler-generated names that persist post fit and do not have location assignments. | Classic |
| Signal Tap: pre-synthesis | Finds all internal device nodes in the pre-synthesis netlist that are preserved for analysis by the Signal Tap Logic Analyzer. | DNI |
| Signal Tap: post-fitting | Finds all internal device nodes in the post fit netlist that are preserved for analysis by the Signal Tap Logic Analyzer. | Classic |
| Signal Tap: pre-synthesis user defined | Finds all user defined internal device nodes in the pre-synthesis netlist that are preserved for analysis by the Signal Tap Logic Analyzer. | DNI |
| Signal Tap: post-fitting user defined | Finds all user defined internal device nodes in the post-fit netlist that are preserved for analysis by the Signal Tap Logic Analyzer. | Classic |
| Signal Tap: pre-synthesis preserved for debug | Finds all internal device nodes in the pre-synthesis netlist that are preserved for analysis by the Signal Tap Logic Analyzer. | DNI |
| Signal Tap: post-fitting preserved for debug | Finds all internal device nodes in the post-fit netlist that are preserved for analysis by the Signal Tap Logic Analyzer. | Classic |