AHDL Function Prototype (port name and order also apply to Verilog HDL)

The following AHDL function prototype is located in the AHDL Include File (.inc) Definitionalt_oct.incin the <Intel^® Quartus^® Prime installation directory>\libraries\megafunctions directory.

PARAMETERS

(

        OCT_BLOCK_NUMBER = 0

);

FUNCTION alt_oct (

        aclr,

        calibration_request[OCT_BLOCK_NUMBER-1..0],

        calibration_wait[OCT_BLOCK_NUMBER-1..0],

        clken,

        clock,

        rdn[OCT_BLOCK_NUMBER-1..0],

        rup[OCT_BLOCK_NUMBER-1..0],

        s2pload[OCT_BLOCK_NUMBER-1..0]

)

WITH (

        ENABLE_PARALLEL_TERMINATION,

        OCT_BLOCK_NUMBER,

        POWER_DOWN

)

RETURNS (

        cal_shift_busy[OCT_BLOCK_NUMBER-1..0],

        calibration_busy[OCT_BLOCK_NUMBER-1..0],

        calibration_done[OCT_BLOCK_NUMBER-1..0],

        parallelterminationcontrol[OCT_BLOCK_NUMBER * 14-1..0],

        seriesterminationcontrol[OCT_BLOCK_NUMBER * 14-1..0],

        termination_control[16 * OCT_BLOCK_NUMBER-1..0]

);