ID:16819 Verilog HDL warning at <location>: variable <string> is too small to store FSM state <number>. FSM not extracted

CAUSE: Quartus Prime Integrated Synthesis generated the specified warning message for the specified location in a Design File.

ACTION: No action is required. To remove the warning, address the issue identified by the message text. A future version of the Quartus Prime software will provide more extensive Help for this warning message.