ID:20549 Current module <name> was unexpectedly terminated by signal <signal_number>. This may be because some system resource has been exhausted, or <name> performed an illegal operation. You can view system resource requirements on the System and Software Requirements page of the Intel FPGA website (https://fpgasoftware.intel.com/requirements/).

CAUSE: During design compilation, one of the compilation stages failed. You may have insufficient system resources to compile your design, or an illegal operation was performed.

ACTION: Verify that your system satisfies requirements given in the System and Software Requirements page of the Intel FPGA website. Otherwise, contact Intel Applications for assistance.