Place Stage Reports The Place stage reports describe all device resources the Fitter allocates during logic placement, as well as use of Logic Lock regions and global and other fast signals. Figure 1. Place Stage Reports Global Signal Visualization Report For Intel® Stratix® 10 and Intel Agilex® 7 designs, you can access the Global Signal Visualization report to view global signal routing and clock sector utilization in an interactive heat-map. This report allows you to track the routing and placement of each individual clock. You can use this data to analyze global signal routing congestion issues, and to debug global signal placement and routing failures.