Truth Table/Functionality
When the CONFIG_MODE is set to EXTENDED, the altufm_spi Intel® FPGA IP uses 16-bit word size for the address and data word. Because the WIDTH_UFM_ADDRESS parameter has a maximum legal value of 9 address bits, you must pad the first 7 bits of an address word with 0. The altufm_spi Intel® FPGA IP discards the first 7 address bits. The 8th address bit is the first MSB of the UFM address.
When the CONFIG_MODE is set to BASE, the altufm_spi Intel® FPGA IP uses 8-bit word size for the address and data word and does not discard any address bits.
nCs |
sck |
si |
so |
|---|---|---|---|
1 |
don't care |
don't care |
Z |
0 |
toggle |
serial input bits |
serial output bits |
Resource Usage when CONFIG_MODE = "EXTENDED":
Mode |
Logic Cell |
UFM |
I/O |
|---|---|---|---|
read/write |
131 |
1 |
4 |
read only |
39 |
1 |
4 |
Resource Usage when CONFIG_MODE = "BASE":
Mode |
Logic Cell |
UFM |
I/O |
|---|---|---|---|
read/write |
138 |
1 |
4 |
read only |
70 |
1 |
4 |