CLK-30028: Invalid Generated Clock

Description

Violations of this rule identify generated clocks without a valid base clock as source, or don't have clock latency specified.

Recommendation

Change the clock source to a valid base clock, or specify clock lantency between clock and target.

Severity

High

Tags

Tag Description
sdc Design rule checks related to SDC validity checking.

Device Family

  • Intel®Cyclone® 10 GX
  • Intel®Arria® 10
  • Intel®Stratix® 10
  • Intel®Agilex™