Auto RAM Replacement logic option

Allows the Compiler to find a set of registers and logic that can be replaced with the altsyncram or the lpm_ram_dp Intel^® FPGA IP. Turning on this option may change the functionality of the design.

This option is useful for finding areas of the design that can be implemented more efficiently, and as a result, minimizing the area and maximizing the speed of the design.

This option must be assigned to a design entity or it is ignored. This option is not available for MAX series devices.