Verilog HDL Example Instantiation

alt_inbuf my_inbuf (.i(in), .o(internal_sig)); //in must be declared as an input pin
defparam my_inbuf.io_standard = "2.5 V";
defparam my_inbuf.location = "IOBANK_2";
defparam my_inbuf.enable_bus_hold = "on";
defparam my_inbuf.weak_pull_up_resistor = "off";
defparam my_inbuf.termination = "parallel 50 ohms";