Note: All devices in the Intel® Quartus® Prime software support IBIS model generation. For
additional information about IBIS model device support and support files, refer to the
"IBIS models for Intel Devices" section of the Support section
on the Altera website.
- On the Assignments menu, click Settings.
- In the Category list, select .
- In the Board-Level Signal Integrity
Analysis box, select IBIS
from the Format list.
- Type or browse to the location you want to use as the output directory for the
IBIS Output File. The default location is <project
directory>/board/ibis.
- Turn on Enable model selector to list
all the possible models for each I/O cell in the design.
- compile the design.
Note: The EDA Netlist Writer places the IBIS Output File in the specified
directory. If you have already compiled the design, and want to specify
different EDA tools settings and generate output files without recompiling
the design, click .
- Use the IBIS Output File to perform board-level signal integrity verification
in the Cadence Allegro PCB SI, the Mentor Graphics®
ICX Pro and HyperLynx, and the Zuken CADSTAR and CR-5000 Lightning
software.