LNT-30020: Same Signal Source Drives Synchronous and Asynchronous Ports of the Same Register
Description
A signal race problem can occur if synchronous and asynchronous ports of the same register are driven by the same signal source.
The Design Assistant does not report a violation if the signal source is from a negative-edge sensitive register of the same clock, and if the source register is directly feeding the D and the clrn port.
Recommendation
Ensure that the same signal source does not drive the synchronous port and any other asynchronous port of the same register, for example aload , adata , preset , and clear (active high and active low).
Severity
High
Tags
Tag | Description |
---|---|
nonstandard-timing |
Device Family
- Intel® Arria® 10
- Intel® Cyclone® 10 GX