VHDL Component Declaration
COMPONENT DLATCH PORT (d : IN STD_LOGIC; ena : IN STD_LOGIC; clrn : IN STD_LOGIC; prn : IN STD_LOGIC; q : OUT STD_LOGIC); END COMPONENT;
COMPONENT DLATCH PORT (d : IN STD_LOGIC; ena : IN STD_LOGIC; clrn : IN STD_LOGIC; prn : IN STD_LOGIC; q : OUT STD_LOGIC); END COMPONENT;