Input Ports
Port Name |
Required |
Description |
Comments |
---|---|---|---|
data[] |
Yes |
Data input. Treated as an unsigned binary encoded number. |
Input port LPM_WIDTH wide. |
enable |
No |
Enable. All outputs low when not active. |
If absent, the default value is active (high). |
clock |
No |
Clock for pipelined usage. |
The clock port provides pipelined operation for the lpm_decode function. For LPM_PIPELINE parameter values other than 0 (default value), the clock port must be connected. |
clken |
No |
Clock enable for pipelined usage. |
If omitted, the default is 1. |
aclr |
No |
Asynchronous clear for pipelined usage. |
The pipeline initializes to an undefined (X) logic level. The aclr port can be used at any time to reset the pipeline to all 0s asynchronously to the clock signal. |