Input Ports
Port Name |
Required |
Description |
Comments |
|---|---|---|---|
a0 |
Yes |
Input port that specifies the LSB (bit 0) of the 7-bit device address. |
Use the a0 port to vary the device address allocated to the altufm_i2c Intel® FPGA IP. |
a1 |
Yes |
Input port that specifies the first bit of the 7-bit device address. |
Use the a1 port to vary the device address allocated to the altufm_i2c Intel® FPGA IP. |
a2 |
Yes |
Input port that specifies the second bit of the 7-bit device address. |
Use the a2 port to vary the device address allocated to the altufm_i2c Intel® FPGA IP. |
wp |
No |
Write protect input port. |
If the wp port is set to 1, the memory is write protected and erase and write are disabled. |
oscena |
No |
Signal that enables the internal oscillator. |
De-assert the oscena port to disable the oscillator (osc) port when not using the I2C interface protocol. |