Creating Stamp Model Files with the Intel® Quartus® Prime Software
To create board-level Stamp model files Definition for use with the Mentor Graphics® Tau timing analysis tools:
- If you have not already done so, set up the Tau working environment.
- Create a new project or open an existing project.
- Specify EDA tool settings. In the Board-Level Timing Analysis box, select STAMP from the Format list.
- Type or browse to the location you want to use as the output directory for the Stamp model files. The default location is <project directory>/timing/stamp.
- To create the <design name>_board.data and <design name>_board.mod Stamp model files, compile the
design.Note: The EDA Netlist Writer places the <design name>_board.data and <design name>_board.mod Stamp model files in the \<project name>\timing\stamp directory by default. If you have already compiled the design, and want to specify different EDA tools settings and generate output files without recompiling the design, click Processing > Start > Start EDA Netlist Writer.
- To generate Stamp model files that contain minimum timing information after an initial compilation in the Intel® Quartus® Prime software:
- Perform a minimum timing analysis on the design in the Intel® Quartus® Prime software.
- To generate <design name>_board_min.data and <design name>_board_min.mod Stamp model files, click Start EDA Netlist Writer.