Register Duplication and Register Retiming Node Naming Scheme
New registers created during optimization by the Intel® Quartus® Primesoftware, version 7.1 and later, are named using the following conventions:
- All forms of register duplication, except during Physical Synthesis, use the following convention to name a new register: <original_register_name>~_Duplicate_<id>, where <id> is an integer.
- Register duplication during Physical Synthesis uses the following convention to name a new register: <original_register_name>_NEW_REG<id>, where <id> is an integer.
- All forms of register retiming, except during Physical Synthesis, use the following convention to name a new register: <original_register_name>~<id>, where <id> is an integer.
- Register retiming during Physical Synthesis uses the following convention to name a new register: <original_register_name>_NEW_REG<id>, where <id> is an integer.
The Fitter packs registers with other blocks. If duplication is not required, the register name does not change. If duplication is required, the Intel® Quartus® Primesoftware uses the following naming convention:
- <original_register_name>~_Duplicate_<id>, where <id> is an integer.
Note:
Details on name changes, register additions, and register deletions due to various optimizations are available in the Analysis & Synthesis Optimization Results reports and the Fitter Netlist Optimizations Report.