Performing a Post-Synthesis Simulation with the Riviera-PRO Software
You can use the Aldec Riviera-PRO software to perform a post-synthesis simulation of a VHDL or Verilog HDL design that contains Intel-specific components.
Note:
For details about how to perform a post-synthesis simulation with the Riviera-PRO GUI, refer to the Riviera-PRO documentation from Aldec, Inc.
Note: For more information about using EDA simulators, refer to
Aldec
Active-HDL and Riviera-PRO Support in the
Intel® Quartus® Prime
Handbook.
To continue with the Riviera-PRO simulation flow, perform a gate-level simulation with the Riviera-PRO software.