RES-50002: Asynchronous Reset is Insufficiently Synchronized
Description
When synchronizing an asynchronous reset signal with a reset synchronizer chain, the chain must contain at least two registers. Otherwise, the chain may not be robust enough at synchronizing the reset signal to prevent metastability.
Recommendation
Ensure that all reset synchronizer chains contain at least two registers. Refer to ../rlc1584464111560.htm#rlc1584464111560 for instructions on how to form such a chain.
Severity
High
Stage
Plan, Place, Route, Final
Device Family
- Intel® Agilex™
- Intel® Stratix® 10
- Intel® Cyclone® 10 GX
- Intel® Arria® 10