- If you have not already done so, set up the ModelSim® - Intel® FPGA Edition working environment.
- Start the ModelSim® - Intel® FPGA Edition
software.
- Change to the directory where the ModelSim® - Intel® FPGA Edition libraries are located after they are
compiled.
- To create a new work library, type the following command at the
ModelSim® prompt: vlib work
ModelSim® - Intel® FPGA Edition compiles the design files to
library work by default.
- To change the default library, type the following commands at
the ModelSim® prompt:
vlib <user defined library>
vmapwork <user defined library>
Note: When
you run the ModelSim® - Intel® FPGA Edition software
automatically from the Intel® Quartus® Prime software,
your work library is automatically mapped to rtl_work
for RTL simulation, and gate_work for gate level
simulation. The libraries are created in the <project
directory>\simulation\modelsim directory or the
location you specified in the Output directory box of the Simulation page in theSettings dialog box.
- Before performing a functional or timing simulation, you should
map to libraries and compile design files with the ModelSim® - Intel® FPGA Edition
software.
To continue the ModelSim® - Intel® FPGA Edition flow, you
can perform a functional simulation with the ModelSim® - Intel® FPGA Edition software.