Primitive/Port Interconnections
Not all primitives/ports may connect to all other primitives in a design file. The following lists show the possible interconnections for all primitives/ports except logic and WIRE primitives:
Source |
Destination Primitives |
||||||||
---|---|---|---|---|---|---|---|---|---|
OUTPUT or OUT(3) |
BIDIR or INOUT(3) |
TRI |
GLOBAL |
LCELL |
EXP |
SOFT |
Logic |
INPUT or IN |
|
INPUT or IN |
Y |
N |
Y |
Y |
na |
na |
na |
Y |
Y |
OUTPUT or OUT(3) |
N |
N |
N |
N |
N |
N |
N |
N |
N |
BIDIR or INOUT(3) |
N |
N |
Y |
N |
na |
na |
na |
Y |
Y |
TRI |
Y |
Y |
(4) |
na |
(4) |
(4) |
(4) |
(4) |
(4) |
OPNDRN |
Y |
Y |
(4) |
na |
(4) |
(4) |
(4) |
(4) |
(4) |
GLOBAL |
na |
N |
(5) |
Y |
na |
na |
na |
na |
na |
LCELL |
Y |
N |
Y |
Y |
na |
na |
na |
Y |
na |
EXP |
na |
N |
na |
Y |
na |
na |
na |
Y |
na |
SOFT |
Y |
N |
na |
Y |
na |
na |
na |
Y |
na |
VCC |
Y |
N |
Y |
N |
na |
na |
na |
Y |
N |
GND |
Y |
N |
Y |
N |
na |
na |
na |
Y |
N |
Logic |
Y |
N |
Y |
Y |
Y |
Y |
Y |
Y |
Y |
Reg Out |
Y |
N |
Y |
Y |
na |
na |
Y |
Y |
Y |
CASCADE |
na |
na |
na |
N |
na |
na |
na |
Y |
na |
Source |
Destination |
|||||
---|---|---|---|---|---|---|
Primitive |
Register Port |
|||||
CARRY |
CASCADE |
OPNDRN |
CLK |
PRN |
CLRN |
|
INPUT or IN |
na |
na |
Y |
Y |
Y |
Y |
OUTPUT or OUT(3) |
na |
na |
N |
N |
N |
N |
BIDIR or INOUT(3) |
na |
na |
Y |
Y |
Y |
Y |
TRI |
na |
na |
(4) |
(4) |
(4) |
(4) |
OPNDRN |
na |
na |
(4) |
(4) |
(4) |
(4) |
GLOBAL |
Y |
na |
na |
Y |
Y |
Y |
LCELL |
na |
na |
Y |
Y |
Y |
Y |
EXP |
na |
na |
na |
na |
na |
na |
SOFT |
na |
na |
na |
Y |
Y |
Y |
VCC |
na |
na |
Y |
N |
Y |
Y |
GND |
na |
na |
Y |
N |
Y |
Y |
Logic |
Y |
Y |
Y |
Y |
Y |
Y |
Reg Out |
na |
na |
Y |
Y |
Y |
Y |
CASCADE |
na |
na |
na |
na |
na |
na |
Legend:
Y |
Interconnection is legal. |
N |
Interconnection is illegal. |
na |
Interconnection is legal but not advisable or may implement logic inefficiently. |
(1) |
Includes both data and output enable inputs to TRI. |
(2) |
The INPUT or IN primitive/port can only be fed by device pins or higher levels in the hierarchy. |
(3) |
The OUTPUT (or OUT), and BIDIR (or INOUT) primitives/ports can only drive out to device pins or higher levels in the hierarchy. |
(4) |
These connections change to legal (Y) or not advisable (na) only if the output of the TRI or OPNDRN is also connected to a BIDIR/INOUT primitive/port. |
(5) |
For MAX7000 devices, a NOT gate may be required between the input pin and GLOBAL when the GLOBAL buffer feeds the output enable input to a TRI buffer. |