CLK-30029: Invalid Clock Assignments

Design Assistant detected at least one invalid clock assignment.

Recommendation

Verify that no registers are clocked by both the rising and falling edges of the same clock. If necessary, create two separate clocks that have similar settings, and assign to the same node.

Severity

High

Stage

Final

Device Family

  • Intel® Agilex™
  • Intel® Stratix® 10
  • Intel® Arria® 10
  • Intel® Cyclone® 10 GX