RES-30131: Reset Polarity Conflict
A signal drives reset pins with opposite polarities.
Recommendation
Verify the polarity of the differing reset and correct any errors in polarity according to the guidelines in AN 891: Using the Reset Release Intel® Stratix® 10 FPGA IP.
Severity
Medium
Stage
Synthesis
Device Family
- Intel® Stratix® 10
- Intel® Agilex™
- Intel® Arria® 10
- Intel® Cyclone® 10 GX