Previewing the System Interconnect

To open the System with Platform Designer Interconnect window, click System > Show System With Platform Designer Interconnect, or click the Show System With Interconnect button in the Domains tab.

The System with Platform Designer Interconnect window has the following tabs:

• System Contents—displays the original instances in your system, as well as the inserted interconnect instances. Connections between interfaces are replaced by connections to interconnect where applicable.
• Schematic—displays a schematic representation that shows the multiple interconnects together as a complete system.
• Hierarchy—displays a system hierarchical navigator, expanding the system contents to show modules, interfaces, signals, contents of subsystems, and connections.
• Parameters—displays the parameters for the selected element in the Hierarchy tab.
• Memory-Mapped Interconnect—allows you to select a memory-mapped interconnect module and view its internal command and response networks. You can also insert pipeline stages to achieve timing closure.

The System Contents, Hierarchy, and Parameters tabs are read-only. Edits that you apply on the Memory-Mapped Interconnect tab are automatically reflected on the Interconnect Requirements tab.

The Memory-Mapped Interconnect tab in the System with Platform Designer Interconnect window displays a graphical representation of command and response datapaths in your system. Datapaths allow you precise control over pipelining in the interconnect. Platform Designer displays separate figures for the command and response datapaths. You can access the datapaths by clicking their respective tabs in the Memory-Mapped Interconnect tab.

Each node element in a figure represents either a master or slave that communicates over the interconnect, or an interconnect sub-module. Each edge is an abstraction of connectivity between elements, and its direction represents the flow of the commands or responses.

Click Highlight Mode (Path, Successors, Predecessors) to identify edges and datapaths between modules. Turn on Show Pipelinable Locations to add greyed-out registers on edges where pipelining is allowed in the interconnect.