Output Buffer Delay Control logic option

A logic option that sets the programmable output buffer delay control. This option specifies whether the output buffer delay is applied on the rising edge, falling edge, or both the rising and falling edge. Enabling this option improves the output duty cycle; however, delay across the output buffer may increase. For information about specifying the output buffer delay value, refer to the Output Buffer Delay logic option.

This option is available for supported device (Arria^® series, Stratix^® III, Stratix^® IV, and Stratix^® V) families.