Auto Clock Enable Replacement logic option

Allows the Compiler to find logic that feeds a register and move the logic to the register's clock enable input port.

This option can be turned off on individual registers or design entities to solve fitting and performance issues with designs that have many clock enable signals generated by Analysis & Synthesis.

This option must be assigned to either an individual register or a design entity containing registers or it is ignored. This option is available for all Intel devices that the Intel^® Quartus^® Prime software supports.