Files Tab (Platform Designer Component Editor)

You access this tab in the Platform Designer Component Editor by clicking the Files tab.

On the Files tab, you specify the files that are created when an instance of a component is generated. A component can generate files for synthesis with the Intel^® Quartus^® Prime software, and VHDL or Verilog files for simulation. Each list of files can also contain files that guide synthesis or simulation, such as timing constraint files.

Note: For more information about creating components in Platform Designer, refer to the Creating Platform Designer Components Help topic, and the Creating Platform Designer Componentschapter in volume 1 of the Intel^® Quartus^® Prime Handbook.