VHDL Definition

The Very High Speed Integrated Circuit (VHSIC) Hardware Description Language (VHDL) is a language that describes the behavior of electronic circuits, most commonly digital circuits. VHDL is defined by IEEE standards. There are two common variants: VHDL-1987 and VHDL-1993. VHDL can be used for designing hardware and for creating test entities to verify the behavior of that hardware. VHDL is used as a design entry format by a variety of EDA tools, including synthesis tools such as Quartus^® Prime Integrated Synthesis, simulation tools, and formal verification tools.